dmaad - direct memory access analog-to-digtial conversion


#include <dmaad_p.h>
#include <stdio_p.h>
#include <ioctl_p.h>
#include <signal_p.h>

FD dopen (path)
char *path;

int dclose (fildes)
FD fildes;

int dread (fildes, pval)
FD fildes;
unsigned *pval;

int dioctl (fildes, cmd, arg)
FD fildes;
int cmd;
struct ad_ctl *arg;

dad_start (fildes)
FD fildes;

dad_xstart (fildes)
FD fildes;

extern int dadfull;


This interface controls the Data Translation DT3362, a high speed, 8 channel, 12-bit analog to digital converter with DMA capabilities.

dopen inititializes the device by clearing the control/status register and the DMA control/status, word count, and address pointer registers. It also writes initialization instructions to the channel file RAM and returns a file descriptor to be used to control, read, and close the device. path points to a string "/dev/dadX" X being a number between 1 and n where n is the number of DMA A/D devices configured in the system.

dclose clears the control/status register, the DMA control/status register, the DMA word count, and the DMA address pointer and returns 0.

dread reads a single converted value under the program control (interrupts disabled). It starts the analog-to-digital conversion for the channel that has been specified in a previous call to dioctl and waits until the end of conversion flag or error flag is set. It then reads the converted value, storing it in the address passed as pval and returns 0.

dioctl sets and inspects the device registers. It is primarily used to set up control for converting multiple samples from multiple channels under DMA operation. It is also used to supply a channel number for dread.

When the argument cmd is SETP, then the values specified in the structure ad_ctl pointed to by the argument arg are used to control the device. When the argument cmd is GETP, then the current values of the device registers are returned in the structure. This structure is defined in dmaad_p.h:

struct ad_ctl {
  unsigned ad_flags;
  unsigned ad_dma;
  int      ad_nchan;
  int      *ad_pchan;
  int      ad_chpage;
  int      ad_nsamp;
  int      *ad_bufa;
  int      *ad_bufb;
The ad_flags field of the argument structure contains several bits that correspond to the device control/status register. The symbolic values that are defined in dmaad_p.h and are relevant to the user include:
DAD_ERR		0100000		error flag (R)
DAD_EENABLE	0040000		enable interrupt on error (R/W)
DAD_DONE	0000200		end of conversion flag (R)
DAD_IENABLE	0000100		enable interrupt on done (R/W)
The end-of-conversion flag is set when a non-DMA conversion completes; the error flag is set when a non_DMA conversion error occurs. The interrupt enable flags when set cause hardware interrupts to be generated at the end of a conversion or on an error. The interrupt enable flags also control interrupts for DMA operation.

Bits set in the ad_dma field specify information for operating the deivice using DMA transfer. The symbolic values that are defined in dmaad_p.h and are relevant to the user include.

DAD_DONE	0000200		end of DMA operation flag (R)
DAD_DERR	0000100		DMA error (R)
DAD_SBURST	0000010		semi-burst mode enable (R/W)
DAD_BURST	0000004		burst mode enable (R/W)
DAD_DMAQ	0000001		DMA to Q-bus enable (R/W)
To enable DMA transfer, DAD_DMAQ must be set. In addition, one of three conversion schemes can be selected: single conversion, semi-burst, and burst. In single conversion mode (no bits set), each start-conversion trigger will cause one conversion from the next channel in the channel list file. In semi-burst mode (DAD_SBURST set), with each start trigger, conversions take place for each channel in the channel list file. In burst mode (DAD_BURST set), given the start trigger, the DMA A/D will run through all the channels in the channel list file until the total number of conversions specified in the word count register are obtained. When a DMA operation completes (when the word count register readches zero), DAD_DDONE is set in the DMA control/status register. If an error occurs during DMA operaiton, DAD_DERR is set.

The DMA A/D contains a file for storing channel specifications. The file consists of four pages of RAM; each page can hold up to 256 channel numbers. Three fields in the ad_ctl provide information for programming the channel file. ad_nchan specifies the number of channels (up to 256) in the array pointed to by ad_pchan; ad_chpage specifies one of the four pages (0-3).

ad_nsamp is the DMA word count. ad_bufa is the memory address for storing samples using DMA transfer; ad_bufb is a second buffer address for double buffering operation.

dad_start is a macro for starting a conversion under program control. dad_xstart sets the external trigger flag, allowing conversions to be controlled by an external oscillator.

If the end-of-conversion interrupt is enabled, the device will interrupt at the end of a conversion or DMA operation. The interrupt routine sends the signal SIGDAD along with the file descriptor and the address of the buffer just filled. The user may choose to ignore this signal or may write a signal routine to do special processing on the samples. In either case, before calling dad_xstart a call to signal(2P) must occur.

If a conversion error occurs and the error interrupt is enabled, an interrupt is generated and the signal SIGDADERR is sent.

The external variable dadfull, declared in dmaad_p.h is provided for synchronizing double buffering. Each time a buffer is filled by the DMA A/D dadfull is incremented. Each time the user program finishes processing a buffer of samples, it must decrement the variable.


/dev/dadX path name for DMA A/D X.


signal(2F) , dmaad(3U) , dmada(4F) , User Manual for DT3362.


If dopen is invoked with a path name not defined by the configuration, it returns -1. If dclose, dread, or dioctl are passed illegal descriptors, a value of -1 is returned. If dioctl is passed an illegal cmd argument or if control information passed in the argument structure is incomplete or illegal, a value of -1 is returned.